The present invention relates to a power supply circuit, and more particularly, to a power supply circuit for providing a semiconductor integrated circuit device with a plurality of power supply voltages.
In the prior art, progress has been made in increasing the speed and integration of semiconductor integrated circuit devices (LSI). Further, to meet the demand for semiconductor devices that consume less power, the voltage for semiconductor devices has decreased. Electronic devices include various types of semiconductor devices, each of which is provided with a power supply having a voltage suitable for the semiconductor device. Since the semiconductor devices are powered by the power supplies in a certain order, operation of a semiconductor device may become unstable depending on the order. Accordingly, Japanese Patent Laid-Open Publication Nos. 8-95652, 11-143559, and 2004-129333 propose a power supply circuit for controlling the order of providing semiconductor devices with a plurality of different power supply voltages.
Further, when a single semiconductor device has a plurality of circuits operating at different power supply voltages, operation of the circuits may become unstable depending on the order in which the different voltages are supplied. For example, an Application Specific Integrated Circuit (ASIC), which functions as a semiconductor device, includes an input/output circuit (I/O circuit or interface) operating at a standard voltage (voltage that is common with devices connected to the ASIC) and an internal circuit (core unit) operating at a voltage lower than the standard voltage. In this case, the I/O circuit unit must be powered after the internal circuit to prevent the generation of an erroneous signal in the I/O circuit unit. FIG. 1 is a schematic circuit diagram showing a power supply circuit 10 for controlling the supply of power. The power supply circuit 10 is, for example, a DC-DC converter (DC voltage converter circuit).
The power supply circuit 10 includes a converter circuit (DC-DC converter) 12 for supplying a semiconductor circuit 11 with a first voltage V1 generated by stepping down an input voltage Vin and a second voltage V2 substantially equal to the input voltage Vin. The semiconductor circuit 11 includes an internal circuit 11a operated by the first voltage V1 and an I/O circuit 11b operated by the second voltage V2. The converter circuit 12 includes a comparator 22, which compares the first voltage V1 and a reference voltage Vr1, and a PWM control circuit 23, which compares a comparison output signal of the comparator 22 and an oscillation output signal of an oscillator 21 to control activation and inactivation of first and second transistors T1 and T2 based on the comparison result in order to generate the first voltage V1 by stepping down the input voltage Vin. The power supply circuit 10 further includes a switch circuit 13, which is configured by a transistor TS, and a switch control circuit (SW control section) 14, which controls the switch circuit 13. The switch control circuit 14 includes a comparator 25, which compares the first voltage V1 and a reference voltage Vr2, and controls the activation and inactivation of the transistor TS based on the comparison result. Specifically, when the first voltage V1 becomes higher than the reference voltage Vr2, the comparator 25 activates the transistor TS to generate the second voltage V2 substantially equal to the input voltage Vin generated.
As shown in FIG. 2, an electronic device has a plurality of semiconductor integrated circuits 31. Each of the semiconductor integrated circuits 31 has an internal circuit and an I/O circuit. Each semiconductor device functions erroneously when the power supply voltage provided to the internal circuit fluctuates. Thus, the power supply voltage must be accurate (close to the desired value). Therefore, each semiconductor device incorporates the power supply circuit 10.